Figure 4-16. Matrix strapping.
Figure 4-17. Modem/clock strapping.
Figure 4-18. MUX/DEMUX strapping.
Figure 4-19. Normal Wideband LTU..
Figure 4-21. Trunk signaling buffer B.
Figure 4-22. Switch memory control.
Figure 4-23. Loop clock selector.
Figure 4-24. Diphase loop modem A.
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