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AN/UYS-2/2A Enhanced Modular Signal Processor (EMSP)

Navy signal processors are designed for repetitive, computationally intensive processing of sensor signals. These signal processing operations are required at the front-end of weapon systems to reduce digital sensor data to target data for input to data and display process computers.

To support users' systems in facing the full spectrum of signal processing missions and threats, the AN/UYS-2 Enhanced Modular Signal Processor (EMSP) was developed in the 1980s to be the next generation acoustic system. The AN/UYS-2 employs an advanced, distributed, parallel, data-flow architecture well suited to signal processing and accommodates modular expansion and technology insertion. The Processing Graph Method (PGM) was developed to support the data-flow architecture of AN/UYS-2 and provides the critical characteristics of dynamic scheduling of algorithm execution and dynamic assignment of algorithms to processors. The AN/UYS-2 COTS Variant (ACV), which is currently in development, will provide a VME-based COTS hardware system which will maximize user application software reuse in an open systems architecture and provide the capacity to process littoral algorithms from acoustic and non-acoustic (future) sensors.

Because of advances in underwater acoustic algorithm development, PMS428 initiated a two-phased competition for the development of the AN/UYS-2 Enhanced Modular Signal Processor (EMSP) to provide increased processing capacity in a modular design.

The AN/UYS-2 and AN/UYS-2A were designed to support the following Navy ASW weapon systems:

  • P-3 Update IV (Original target program; subsequently canceled by Congress) (SEM B/SEM E)
  • Airborne Low Frequency Sonar (ALFS) on SH-60 helicopter (SEM E)
  • AN/SQQ-89 Surface Ship ASW Combat System (SEM E)
  • AN/UQQ-2 Surveillance Towed Array Sensor System (SURTASS) (SEM B/SEM E)
  • AN/BSY-2 Submarine Combat System on SSN 21 (SEM B).

Summary of AN/UYS-2 Contracts
Year
Procurement
Vendor/Product
Management
1981 - 93
Competitive/Sole Source
FSED
AT&T Technologies*
SEM B and SEM E Development
1987
Sole Source
DTE
>AT&T Technologies*
Limited SEM B Production
1988
Sole Source
IPS
AT&T Technologies*
Integrated Program Support
1989
Sole Source
STM
AT&T Technologies*
Limited SEM E Production
1991
Sole Source
Prod I
AT&T Technologies*
SEM B Full Scale Production
1991
Sole Source
IPS II
AT&T Technologies*
Integrated Program Support
1992
Sole Source
ASIP
AT&T Technologies*
SEM E Platform Customization
1992
Sole Source
MY
AT&T Technologies*
SEM E Multi-Year Production
1994
Sole Source
IPS III
AT&T Technologies*
Integrated Program Support
* AT&T became Lucent Technologies in 1995

In accordance with the EMSP Acquisition Plan 270-81 of 9 March 1981, a competitive Demonstration and Validation Phase (Phase I) was initiated in September 1981. Under Phase I, five competitors (AT&T Technologies, Control Data Corp., Hughes, IBM, Magnavox) were awarded Fixed-Price contracts for concept validation, critical item demonstration, and supporting analyses. Each contract contained unpriced options for follow-on Phase II activity.

Phase II, Full Scale Development (FSD), was initiated in August 1982 with the award of a Cost Plus Fixed Fee type contract option to AT&T Technologies (now Lucent Technologies). Phase II (development of EMSP in SEM B format) included: development of three Functional Development Models (FDM) and one Engineering Prototype Model (EPM) for AT&T development use, and development/delivery of Laboratory Development Equipment (LDE) and Development & Test Equipment (DTE) for user integration of EMSP into weapons systems development activities. Phase II also included the development and insertion of VHSIC technology applications into the DTEs.

Evolving user sensor developments, primarily in the aviation community, drove the requirement for smaller and lighter signal processors with reduced power consumption and lifetime cost while maintaining throughput performance. In order to reduce EMSP size, weight, and power characteristics to meet the required need, the basic EMSP floating point architecture system was repackaged on the larger Format E SEM to meet the requirements of the airborne EMSP users. The conversion from SEM B to SEM E was accomplished by transferring the same architecture, system and logic design from the SEM B program and repackaging it on the larger SEM E circuit cards using denser memory devices and high density gate arrays. Conversion resulted in significant savings in unit price. The SEM E development effort paralleled the first production contract for SEM B EMSPs. The SEM E development program was divided into two major phases; (1) Conceptual Design and (2) FSD of the repackaged architecture determined in Phase 1.

During the Conceptual Design Phase, the repartitioning of the EMSP architecture and impact on program documentation, RM&A, and logistics planning, etc. was determined. This allowed a smooth transition into and early definitization of Phase II. During the FSD Phase, three models were produced; a Functional Development Model (FDM) for laboratory testing, an Engineering Prototype Model (EPM) for integration testing, and DTE for reliability growth testing.

In 1991, there was an effort within DOD to cancel the AN/UYS-2(V) program. Each of the designated users believed they could develop a unique signal processor that would meet their system requirements for less cost and risk than EMSP. Congress denied this request and responded by authorizing the AN/UYS-2A Multi-Year Procurement (MYP). Congress also reduced funding from each user and allocated this funding to PMS428 for the MYP. Concurrently, PMS428 executed the Acoustic System Integration Program (ASIP) contract to AT&T. ASIP was a design and development effort to tailor AN/UYS-2A characteristics for each end user (NTDS-B &SCSI I/O, ALFS backplane & enclosure, SQQ-89 backplane, etc.).

The AN/UYS-2 EMSP employs a distributed, parallel, data-flow architecture well suited to signal processing and accommodates modular expansion and technology insertion. The Processing Graph Method (PGM) was developed to support the data-flow architecture of AN/UYS-2 and provides the critical characteristics of dynamic scheduling of algorithm execution and dynamic assignment of algorithms to available processors.

The AN/UYS-2 configurations are composed of different combinations of six core Functional Elements (FEs): Arithmetic Processors (APs), Global Memories (GMs), Input/Output Processors (IOPs), a Command Program Processor (CPP) a Scheduler (SCH) and a Data Transfer Network (DTN). These FEs, along with power and cooling systems, are packaged in an enclosure appropriate to the host system's application. An optional FE, the Input signal Conditioner (ISC), interfaces the AN/UYS-2 to sonobouy and other subsystems, if required by the application. AN/UYS-2 parallel processing capabilities are matched to each weapon system's requirements by selecting that combination of APs, GMs, IOPs and ISCs which optimally satisfies the individual weapon systems requirements. This allows the AN/UYS-2 to grow in processing capability by adding additional FEs, if needed, to satisfy the user's changing requirements. Figure 10 shows a representative EMSP functional diagram. It depicts the system architecture and shows the functions(s) of each FE.

There are five categories of AN/UYS-2 software: Category A.1 = Application Development; Category A.2 = Machine Resident; Category B = Product Management; Category C = Manufacturing and Test; Category SEF = Software Engineering Facility. Categories A.1 and A.2 software are distributed to all AN/UYS-2 customers and form the basic core of the EMSP System Software (ESS). The other categories of software primarily support the commodity management function performed by Lucent and the Computer Program Support Activity (CPSA) for PMS428.

The SEM E design used the same basic architecture concept as its SEM B predecessor, but employed newer technology to achieve the high performance demanded in a reduced weight, reduced volume, and more cost effective implementation. The SEM B uses 43 common AN/UYS-2 SEM types, where SEM E uses only 10 types. These 10 common SEMs, along with standard power supplies, comprise the complete set of spares needed to maintain the AN/UYS-2A SEM E product line. The SEM E achieves greater processing in a given volume by greater use of Application Specific Integrated Circuit (ASIC) components. The new SEM E cards eliminate the need for inter-FE cabling by making all FE interconnections through a single, multi-layer backplane. The CPP and IOP are built around the Motorola 68020, a 32 bit microprocessor, to extend addressability and increase operating speed. The AN/UYS-2A has a maximum aggregate I/O capability of 5 Mbytes/sec and a burst rate of 40 Mbytes/sec. SEM B and SEM E product lines are software compatible except for their command programs and I/O programs. The SEM B command program, coded in CMS-2 must be rewritten in Ada to run in the SEM E's CPP. When the rewritten command program is compiled with the original SEM B processing graphs and the machine resident software, an executable program image for the SEM E machine is produced.




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